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TSMC: Goes by 2025 to 2nm with 30% performance increase

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Η Taiwan Semiconductor Manufacturing Co.. officially presented at 2022 TSMC Technology Symposium, its manufacturing technology N2 (category 2 nm)


O its first node TSMC in the category of 2 nm will use field effect transistors (GAAFETs - gate-all-around field-effect transistors) and the new manufacturing process will offer performance and power advantages, but in terms of transistor density, it will hardly impress in 2025 when it is released.

Being a brand new process technology platform, the N2 of TSMC brings two key innovations: nanofoil transistors (which is what T callsSMC as GAAFET) and  back side power rail serving the same purpose of increasing the performance characteristics per watt of the node.

The nanofoil transistors GAA have channels surrounded by gates on all four sides, which reduces leakage. In addition, their channels can be widened to increase traffic flow and boost efficiency or shrink to minimize power consumption and costs.

To power these nanofoil transistors with enough power and now waste any of them, the N2 of TSMC uses power supply at the rear, which is considered to be one of the best solutions for fighting back-end-of-line resistors (beol).

Indeed, in terms of energy efficiency and consumption, TSMC nano-based N2 node can achieve 10% to 15% higher yield with the same power and complexity, and 25% to 30% lower energy consumption at the same frequency and number of transistors compared to TSMC N3E. However, the new node increases the chip density by only about 1,1X compared to the N3E.

In general, the N3 of TSMC offers full node efficiency increases and power consumption reductions. But in terms of density, new technology can hardly impress. For example, the node N3E of TSMC offers 1,3X increase in chip density compared to N5, which is a significant increase.


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The official community of Xiaomi and MIUI in Greece.
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